Machine Check Event reported is a corrected PCI bus Parity error reported to CPU %1. %2 additional error(s) are contained within the record.
Machine Check Event reported is a corrected Micro Architecture Structure error reported to CPU %1. %2 additional error(s) ...
Machine Check Event reported is a corrected PCI bus Master abort error during a transaction type %3 at address %4 on PCI ...
Machine Check Event reported is a corrected PCI bus Master abort error reported to CPU %1. %2 additional error(s) are contained ...
Machine Check Event reported is a corrected PCI bus Parity error during a transaction type %3 at address %4 on PCI bus %5 ...
Machine Check Event reported is a corrected PCI bus Parity error reported to CPU %1. %2 additional error(s) are contained ...
Machine Check Event reported is a corrected PCI bus SERR error during a transaction type %3 at address %4 on PCI bus %5 reported ...
Machine Check Event reported is a corrected PCI bus SERR error reported to CPU %1. %2 additional error(s) are contained within ...
Machine Check Event reported is a corrected PCI bus Timeout error during a transaction type %3 at address %4 on PCI bus %5 ...
Machine Check Event reported is a corrected PCI bus Timeout error reported to CPU %1. %2 additional error(s) are contained ...